- Joined
- Aug 28, 2019
The easiest way to compare the efficiency of Zen 4/5 is to compare the 65W Ryzen 7 7700 to the 65W Ryzen 7 9700X, although if the default TDP gets raised to 105W by AGESA 1.2.0.1A, suddenly the 9700X is a true 7700X competitor.Just looking into GN's numbers a bit. I think he is right that the efficiency gains here are pretty underwhelming. One reason is there supposedly is only about a 6% transistor density improvement going from TSMC N5 to N4P. (This is what people are citing: https://www.techinsights.com/products/ace-2204-801). TSMC claims a 22% improvement in power efficiency.
But he is also directly comparing unlike processors. The higher you clock a CPU, the less efficient is, so it is not surprising at all that the 9950X, with its clock of 4.3-5.7 GHz, is less efficient than the lower-end CPUs with slower clock speeds. he doesn't mention that in his 7-Zip section. Notably, the 9700X (3.8-5.5 Ghz) is quite a bit more efficient than the 7700X (3.8-5.3 GHz), about 38% more efficient. That's not nothing.
Despite TSMC N4P allegedly being only "6%" more dense than TSMC N5, the Zen 5 CCD is said to have about +28% density. More like +28% transistors, +28.7% density from a slight die size decrease:
Codename | Cores | Die Size | Transistor Count | Node | Transistor Density |
Ryzen 7000 'Durango' | 8 Zen 4 | 71 mm^2 | 6.5 billion | 5 nm | 92.9 MTr/mm^2 |
Ryzen 9000 'Eldora' | 8 Zen 5 | 70.6 mm^2 | 8.315 billion | N4P | 117.78 MTr/mm^2 |
How? The "6%" from TSMC is probably an underestimate due to averaging logic, SRAM, and analog transistors. And maybe they're using a different cell library or something. L2/L3 cache amounts in the CCD haven't changed. I think they need to be doing something to decrease empty space in there...
Here's one discrepancy. Tom's Hardware is sourcing from a German tech outlet, and they're saying that the node used could be TSMC N4X.
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